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authorTaylor Simpson <tsimpson@quicinc.com>2023-04-27 15:40:49 -0700
committerTaylor Simpson <tsimpson@quicinc.com>2023-05-18 12:40:51 -0700
commitfc2622f660fea5355565a6734c74f68e65953ac8 (patch)
tree3b1785dd760b52ee4b00bcd9969c5647003cc277 /target/hexagon/cpu.c
parent278238505d28d292927bff7683f39fb4fbca7fd1 (diff)
Hexagon (target/hexagon) Add support for v68/v69/v71/v73
Add support for the ELF flags Move target/hexagon/cpu.[ch] to be v73 Change the compiler flag used by "make check-tcg" The decbin instruction is removed in Hexagon v73, so check the version before trying to compile the instruction. Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230427224057.3766963-2-tsimpson@quicinc.com>
Diffstat (limited to 'target/hexagon/cpu.c')
-rw-r--r--target/hexagon/cpu.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index ab40cfc283..c78fe25c9f 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -1,5 +1,5 @@
/*
- * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ * Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -25,9 +25,11 @@
#include "fpu/softfloat-helpers.h"
#include "tcg/tcg.h"
-static void hexagon_v67_cpu_init(Object *obj)
-{
-}
+static void hexagon_v67_cpu_init(Object *obj) { }
+static void hexagon_v68_cpu_init(Object *obj) { }
+static void hexagon_v69_cpu_init(Object *obj) { }
+static void hexagon_v71_cpu_init(Object *obj) { }
+static void hexagon_v73_cpu_init(Object *obj) { }
static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
{
@@ -382,6 +384,10 @@ static const TypeInfo hexagon_cpu_type_infos[] = {
.class_init = hexagon_cpu_class_init,
},
DEFINE_CPU(TYPE_HEXAGON_CPU_V67, hexagon_v67_cpu_init),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V68, hexagon_v68_cpu_init),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V69, hexagon_v69_cpu_init),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V71, hexagon_v71_cpu_init),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V73, hexagon_v73_cpu_init),
};
DEFINE_TYPES(hexagon_cpu_type_infos)