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| author | Max Filippov <jcmvbkbc@gmail.com> | 2018-04-27 13:07:53 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2018-06-30 11:58:02 -0700 |
| commit | f40385c959d01bf33a0e3c12ef0fdb402ad98a1c (patch) | |
| tree | 24398a0e9854be44bb97140b817723cff0a1c463 /target/cris | |
| parent | e3800998e66c13b24d8cc8a06fdcc8d03cd408fc (diff) | |
target/xtensa: check zero overhead loop alignment
ISA book documents that the first instruction of zero overhead loop
must fit completely into naturally aligned region of an instruction
fetch unit size. Check that condition and log a message if it's
violated.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/cris')
0 files changed, 0 insertions, 0 deletions