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| author | Max Filippov <jcmvbkbc@gmail.com> | 2020-06-30 14:52:25 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2020-08-21 12:48:16 -0700 |
| commit | 5c10f488ea42dcdd63c8b37792c1e04d69208197 (patch) | |
| tree | 9e37129ee96a3db4824059e1fe5c3902669142cd /target/cris/mmu.c | |
| parent | ac81ff227d264b29b8b75068a75d047e2d736d6f (diff) | |
tests/tcg/xtensa: update test_fp0_conv for DFPU
DFPU conversion opcodes update FSR flags. Add FSR parameters and
expected FSR register values for the conversion tests.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target/cris/mmu.c')
0 files changed, 0 insertions, 0 deletions