diff options
author | Thomas Huth <thuth@redhat.com> | 2016-10-11 08:56:52 +0200 |
---|---|---|
committer | Thomas Huth <thuth@redhat.com> | 2016-12-20 21:52:12 +0100 |
commit | fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 (patch) | |
tree | 2b450d96b01455df8ed908bf8f26ddc388a03380 /target/cris/crisv10-decode.h | |
parent | 82ecffa8c050bf5bbc13329e9b65eac1caa5b55c (diff) |
Move target-* CPU file into a target/ folder
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.
Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part]
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part]
Acked-by: Michael Walle <michael@walle.cc> [lm32 part]
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part]
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part]
Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part]
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part]
Acked-by: Richard Henderson <rth@twiddle.net> [alpha part]
Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part]
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part]
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part]
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part]
Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'target/cris/crisv10-decode.h')
-rw-r--r-- | target/cris/crisv10-decode.h | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/target/cris/crisv10-decode.h b/target/cris/crisv10-decode.h new file mode 100644 index 0000000000..bdb4b6d318 --- /dev/null +++ b/target/cris/crisv10-decode.h @@ -0,0 +1,108 @@ +/* + * CRISv10 insn decoding macros. + * + * Copyright (c) 2010 AXIS Communications AB + * Written by Edgar E. Iglesias. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ + +#define CRISV10_MODE_QIMMEDIATE 0 +#define CRISV10_MODE_REG 1 +#define CRISV10_MODE_INDIRECT 2 +#define CRISV10_MODE_AUTOINC 3 + +/* Quick Immediate. */ +#define CRISV10_QIMM_BCC_R0 0 +#define CRISV10_QIMM_BCC_R1 1 +#define CRISV10_QIMM_BCC_R2 2 +#define CRISV10_QIMM_BCC_R3 3 + +#define CRISV10_QIMM_BDAP_R0 4 +#define CRISV10_QIMM_BDAP_R1 5 +#define CRISV10_QIMM_BDAP_R2 6 +#define CRISV10_QIMM_BDAP_R3 7 + +#define CRISV10_QIMM_ADDQ 8 +#define CRISV10_QIMM_MOVEQ 9 +#define CRISV10_QIMM_SUBQ 10 +#define CRISV10_QIMM_CMPQ 11 +#define CRISV10_QIMM_ANDQ 12 +#define CRISV10_QIMM_ORQ 13 +#define CRISV10_QIMM_ASHQ 14 +#define CRISV10_QIMM_LSHQ 15 + + +#define CRISV10_REG_ADDX 0 +#define CRISV10_REG_MOVX 1 +#define CRISV10_REG_SUBX 2 +#define CRISV10_REG_LSL 3 +#define CRISV10_REG_ADDI 4 +#define CRISV10_REG_BIAP 5 +#define CRISV10_REG_NEG 6 +#define CRISV10_REG_BOUND 7 +#define CRISV10_REG_ADD 8 +#define CRISV10_REG_MOVE_R 9 +#define CRISV10_REG_MOVE_SPR_R 9 +#define CRISV10_REG_MOVE_R_SPR 8 +#define CRISV10_REG_SUB 10 +#define CRISV10_REG_CMP 11 +#define CRISV10_REG_AND 12 +#define CRISV10_REG_OR 13 +#define CRISV10_REG_ASR 14 +#define CRISV10_REG_LSR 15 + +#define CRISV10_REG_BTST 3 +#define CRISV10_REG_SCC 4 +#define CRISV10_REG_SETF 6 +#define CRISV10_REG_CLEARF 7 +#define CRISV10_REG_BIAP 5 +#define CRISV10_REG_ABS 10 +#define CRISV10_REG_DSTEP 11 +#define CRISV10_REG_LZ 12 +#define CRISV10_REG_NOT 13 +#define CRISV10_REG_SWAP 13 +#define CRISV10_REG_XOR 14 +#define CRISV10_REG_MSTEP 15 + +/* Indirect, var size. */ +#define CRISV10_IND_TEST 14 +#define CRISV10_IND_MUL 4 +#define CRISV10_IND_BDAP_M 5 +#define CRISV10_IND_ADD 8 +#define CRISV10_IND_MOVE_M_R 9 + + +/* indirect fixed size. */ +#define CRISV10_IND_ADDX 0 +#define CRISV10_IND_MOVX 1 +#define CRISV10_IND_SUBX 2 +#define CRISV10_IND_CMPX 3 +#define CRISV10_IND_JUMP_M 4 +#define CRISV10_IND_DIP 5 +#define CRISV10_IND_JUMP_R 6 +#define CRISV17_IND_ADDC 6 +#define CRISV10_IND_BOUND 7 +#define CRISV10_IND_BCC_M 7 +#define CRISV10_IND_MOVE_M_SPR 8 +#define CRISV10_IND_MOVE_SPR_M 9 +#define CRISV10_IND_SUB 10 +#define CRISV10_IND_CMP 11 +#define CRISV10_IND_AND 12 +#define CRISV10_IND_OR 13 +#define CRISV10_IND_MOVE_R_M 15 + +#define CRISV10_IND_MOVEM_M_R 14 +#define CRISV10_IND_MOVEM_R_M 15 + |