diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2021-07-20 05:48:46 -1000 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2021-07-21 07:47:05 -1000 |
commit | e64cb6c231e0de00f88d4cd0c4dd3481dacfc0d9 (patch) | |
tree | 5f4709523dbed87f9ef1f0f98a222b1c2064265e /target/avr | |
parent | 5bc31e944019e46daeb7dd4d19280e8333aa448d (diff) |
target/avr: Implement gdb_adjust_breakpoint
Ensure at registration that all breakpoints are in
code space, not data space.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/avr')
-rw-r--r-- | target/avr/cpu.c | 1 | ||||
-rw-r--r-- | target/avr/cpu.h | 1 | ||||
-rw-r--r-- | target/avr/gdbstub.c | 13 | ||||
-rw-r--r-- | target/avr/translate.c | 14 |
4 files changed, 15 insertions, 14 deletions
diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 57e3fab4a0..ea14175ca5 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -223,6 +223,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) cc->disas_set_info = avr_cpu_disas_set_info; cc->gdb_read_register = avr_cpu_gdb_read_register; cc->gdb_write_register = avr_cpu_gdb_write_register; + cc->gdb_adjust_breakpoint = avr_cpu_gdb_adjust_breakpoint; cc->gdb_num_core_regs = 35; cc->gdb_core_xml_file = "avr-cpu.xml"; cc->tcg_ops = &avr_tcg_ops; diff --git a/target/avr/cpu.h b/target/avr/cpu.h index d148e8c75a..93e3faa0a9 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -162,6 +162,7 @@ hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int avr_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); int avr_print_insn(bfd_vma addr, disassemble_info *info); +vaddr avr_cpu_gdb_adjust_breakpoint(CPUState *cpu, vaddr addr); static inline int avr_feature(CPUAVRState *env, AVRFeature feature) { diff --git a/target/avr/gdbstub.c b/target/avr/gdbstub.c index c28ed67efe..1c1b908c92 100644 --- a/target/avr/gdbstub.c +++ b/target/avr/gdbstub.c @@ -82,3 +82,16 @@ int avr_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) return 0; } + +vaddr avr_cpu_gdb_adjust_breakpoint(CPUState *cpu, vaddr addr) +{ + /* + * This is due to some strange GDB behavior + * Let's assume main has address 0x100: + * b main - sets breakpoint at address 0x00000100 (code) + * b *0x100 - sets breakpoint at address 0x00800100 (data) + * + * Force all breakpoints into code space. + */ + return addr % OFFSET_DATA; +} diff --git a/target/avr/translate.c b/target/avr/translate.c index 8237a03c23..f7202a646b 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -2958,20 +2958,6 @@ static void avr_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) DisasContext *ctx = container_of(dcbase, DisasContext, base); TCGLabel *skip_label = NULL; - /* - * This is due to some strange GDB behavior - * Let's assume main has address 0x100: - * b main - sets breakpoint at address 0x00000100 (code) - * b *0x100 - sets breakpoint at address 0x00800100 (data) - * - * The translator driver has already taken care of the code pointer. - */ - if (!ctx->base.singlestep_enabled && - cpu_breakpoint_test(cs, OFFSET_DATA + ctx->base.pc_next, BP_ANY)) { - gen_breakpoint(ctx); - return; - } - /* Conditionally skip the next instruction, if indicated. */ if (ctx->skip_cond != TCG_COND_NEVER) { skip_label = gen_new_label(); |