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authorRichard Henderson <richard.henderson@linaro.org>2022-08-26 13:53:32 -0700
committerRichard Henderson <richard.henderson@linaro.org>2022-09-01 06:42:21 +0100
commit36027c70974fef1392e6c73dfb94c3f94f0930bc (patch)
tree70f4dd74f40b820a8f12c9add46c8634bd15cbe0 /target/avr/helper.c
parentcecaad540155927f2faf1b6897c72cc59074cb45 (diff)
target/avr: Disable interrupts when env->skip set
This bit is not saved across interrupts, so we must delay delivering the interrupt until the skip has been processed. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1118 Reviewed-by: Michael Rolnik <mrolnik@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/avr/helper.c')
-rw-r--r--target/avr/helper.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/target/avr/helper.c b/target/avr/helper.c
index 34f1cbffb2..156dde4e92 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -31,6 +31,15 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
AVRCPU *cpu = AVR_CPU(cs);
CPUAVRState *env = &cpu->env;
+ /*
+ * We cannot separate a skip from the next instruction,
+ * as the skip would not be preserved across the interrupt.
+ * Separating the two insn normally only happens at page boundaries.
+ */
+ if (env->skip) {
+ return false;
+ }
+
if (interrupt_request & CPU_INTERRUPT_RESET) {
if (cpu_interrupts_enabled(env)) {
cs->exception_index = EXCP_RESET;