diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2019-06-11 16:39:48 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-06-13 15:14:05 +0100 |
| commit | 519ee7ae31e050eb0ff9ad35c213f0bd7ab1c03e (patch) | |
| tree | d28482774c2cc078d256101495f53675f65b7155 /target/arm | |
| parent | 8fec9a119264b7936503abce3c106fad7e3ccb76 (diff) | |
target/arm: Convert VDIV to decodetree
Convert the VDIV instruction to decodetree.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/translate-vfp.inc.c | 10 | ||||
| -rw-r--r-- | target/arm/translate.c | 21 | ||||
| -rw-r--r-- | target/arm/vfp.decode | 5 |
3 files changed, 16 insertions, 20 deletions
diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index 12da3b8acb..6af99605d5 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -1471,3 +1471,13 @@ static bool trans_VSUB_dp(DisasContext *s, arg_VSUB_sp *a) { return do_vfp_3op_dp(s, gen_helper_vfp_subd, a->vd, a->vn, a->vm, false); } + +static bool trans_VDIV_sp(DisasContext *s, arg_VDIV_sp *a) +{ + return do_vfp_3op_sp(s, gen_helper_vfp_divs, a->vd, a->vn, a->vm, false); +} + +static bool trans_VDIV_dp(DisasContext *s, arg_VDIV_sp *a) +{ + return do_vfp_3op_dp(s, gen_helper_vfp_divd, a->vd, a->vn, a->vm, false); +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 664e3b52fe..48981af862 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1374,22 +1374,6 @@ static TCGv_ptr get_fpstatus_ptr(int neon) return statusptr; } -#define VFP_OP2(name) \ -static inline void gen_vfp_##name(int dp) \ -{ \ - TCGv_ptr fpst = get_fpstatus_ptr(0); \ - if (dp) { \ - gen_helper_vfp_##name##d(cpu_F0d, cpu_F0d, cpu_F1d, fpst); \ - } else { \ - gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, cpu_F1s, fpst); \ - } \ - tcg_temp_free_ptr(fpst); \ -} - -VFP_OP2(div) - -#undef VFP_OP2 - static inline void gen_vfp_abs(int dp) { if (dp) @@ -3109,7 +3093,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) rn = VFP_SREG_N(insn); switch (op) { - case 0 ... 7: + case 0 ... 8: /* Already handled by decodetree */ return 1; default: @@ -3295,9 +3279,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) for (;;) { /* Perform the calculation. */ switch (op) { - case 8: /* div: fn / fm */ - gen_vfp_div(dp); - break; case 10: /* VFNMA : fd = muladd(-fd, fn, fm) */ case 11: /* VFNMS : fd = muladd(-fd, -fn, fm) */ case 12: /* VFMA : fd = muladd( fd, fn, fm) */ diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode index de56f44efc..de305f60e1 100644 --- a/target/arm/vfp.decode +++ b/target/arm/vfp.decode @@ -137,3 +137,8 @@ VSUB_sp ---- 1110 0.11 .... .... 1010 .1.0 .... \ vm=%vm_sp vn=%vn_sp vd=%vd_sp VSUB_dp ---- 1110 0.11 .... .... 1011 .1.0 .... \ vm=%vm_dp vn=%vn_dp vd=%vd_dp + +VDIV_sp ---- 1110 1.00 .... .... 1010 .0.0 .... \ + vm=%vm_sp vn=%vn_sp vd=%vd_sp +VDIV_dp ---- 1110 1.00 .... .... 1011 .0.0 .... \ + vm=%vm_dp vn=%vn_dp vd=%vd_dp |