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authorPeter Maydell <peter.maydell@linaro.org>2017-10-06 16:46:47 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-10-06 16:46:47 +0100
commit3919e60b6efd9a86a0e6ba637aa584222855ac3a (patch)
tree7940183ef4913e9968f8c1722ceff7c97ad072ce /target/arm
parentde2db7ec894f11931932ca78cd14a8d2b1389d5b (diff)
target/arm: Restore security state on exception return
Now that we can handle the CONTROL.SPSEL bit not necessarily being in sync with the current stack pointer, we can restore the correct security state on exception return. This happens before we start to read registers off the stack frame, but after we have taken possible usage faults for bad exception return magic values and updated CONTROL.SPSEL. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1506092407-26985-5-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm')
-rw-r--r--target/arm/helper.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 36173e21a7..b82fc9f163 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6381,6 +6381,8 @@ static void do_v7m_exception_exit(ARMCPU *cpu)
*/
write_v7m_control_spsel(env, return_to_sp_process);
+ switch_v7m_security_state(env, return_to_secure);
+
{
/* The stack pointer we should be reading the exception frame from
* depends on bits in the magic exception return type value (and