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authorMichael Davidsaver <mdavidsaver@gmail.com>2017-01-27 15:20:23 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-01-27 15:29:08 +0000
commit81dd9648c69bb89afdd6f4bb3ed6f3efdac96524 (patch)
tree08fa077bea3e4bae356612d41dcddb01d8f847e4 /target/arm
parentdc858c6633a9af8b80c1509cf6f825e4390d3ad1 (diff)
armv7m: set CFSR.UNDEFINSTR on undefined instructions
When we take an exception for an undefined instruction, set the appropriate CFSR bit. Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1485285380-10565-7-git-send-email-peter.maydell@linaro.org [PMM: tweaked commit message, comment] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
-rw-r--r--target/arm/helper.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 7dc30f5769..e6b1c36a95 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6072,6 +6072,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
switch (cs->exception_index) {
case EXCP_UDEF:
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
+ env->v7m.cfsr |= R_V7M_CFSR_UNDEFINSTR_MASK;
return;
case EXCP_SWI:
/* The PC already points to the next instruction. */