diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2019-09-04 12:30:23 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-09-05 13:23:03 +0100 |
| commit | 542f5188a14758d64f7504580a9bd3cae973f546 (patch) | |
| tree | 86d96a3c3488eda66f5b924408388beb02d58e5a /target/arm | |
| parent | 360144f3b99f9a626ffcc6b9d76537e3a3e0e708 (diff) | |
target/arm: Convert SVC
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-34-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/a32.decode | 4 | ||||
| -rw-r--r-- | target/arm/translate.c | 19 |
2 files changed, 17 insertions, 6 deletions
diff --git a/target/arm/a32.decode b/target/arm/a32.decode index 62c6f8562e..0bd952c069 100644 --- a/target/arm/a32.decode +++ b/target/arm/a32.decode @@ -528,3 +528,7 @@ LDM_a32 ---- 100 b:1 i:1 u:1 w:1 1 rn:4 list:16 &ldst_block B .... 1010 ........................ @branch BL .... 1011 ........................ @branch + +# Supervisor call + +SVC ---- 1111 imm:24 &i diff --git a/target/arm/translate.c b/target/arm/translate.c index 72e4708e61..208021181f 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -10082,6 +10082,18 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a) } /* + * Supervisor call + */ + +static bool trans_SVC(DisasContext *s, arg_SVC *a) +{ + gen_set_pc_im(s, s->base.pc_next); + s->svc_imm = a->imm; + s->base.is_jmp = DISAS_SWI; + return true; +} + +/* * Legacy decoder. */ @@ -10348,6 +10360,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) case 0x09: case 0xa: case 0xb: + case 0xf: /* All done in decodetree. Reach here for illegal ops. */ goto illegal_op; case 0xc: @@ -10363,12 +10376,6 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) goto illegal_op; } break; - case 0xf: - /* swi */ - gen_set_pc_im(s, s->base.pc_next); - s->svc_imm = extract32(insn, 0, 24); - s->base.is_jmp = DISAS_SWI; - break; default: illegal_op: unallocated_encoding(s); |