diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2018-11-06 11:32:14 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-11-06 11:32:14 +0000 |
| commit | 23463e0e4aeb2f0a9c60549a2c163f4adc0b8512 (patch) | |
| tree | b8aef0dbd207a9a7d9cd02b923efa17229ae948e /target/arm | |
| parent | 0f7b791b35f24cb1333f779705a3f6472e6935de (diff) | |
target/arm: Fix ATS1Hx instructions
ATS1HR and ATS1HW (which allow AArch32 EL2 to do address translations
on the EL2 translation regime) were implemented in commit 14db7fe09a2c8.
However, we got them wrong: these should do stage 1 address translations
as defined for NS-EL2, which is ARMMMUIdx_S1E2. We were incorrectly
making them perform stage 2 translations.
A few years later in commit 1313e2d7e2cd we forgot entirely that
we'd implemented ATS1Hx, and added a comment that ATS1Hx were
"not supported yet". Remove the comment; there is no extra code
needed to handle these operations in do_ats_write(), because
arm_s1_regime_using_lpae_format() returns true for ARMMMUIdx_S1E2,
which forces 64-bit PAR format.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20181016093703.10637-3-peter.maydell@linaro.org
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/helper.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 69f684abd8..96301930cc 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2319,7 +2319,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value, * * (Note that HCR.DC makes HCR.VM behave as if it is 1.) * - * ATS1Hx always uses the 64bit format (not supported yet). + * ATS1Hx always uses the 64bit format. */ format64 = arm_s1_regime_using_lpae_format(env, mmu_idx); @@ -2444,7 +2444,7 @@ static void ats1h_write(CPUARMState *env, const ARMCPRegInfo *ri, MMUAccessType access_type = ri->opc2 & 1 ? MMU_DATA_STORE : MMU_DATA_LOAD; uint64_t par64; - par64 = do_ats_write(env, value, access_type, ARMMMUIdx_S2NS); + par64 = do_ats_write(env, value, access_type, ARMMMUIdx_S1E2); A32_BANKED_CURRENT_REG_SET(env, par, par64); } |