diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2019-06-11 16:39:45 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-06-13 15:14:04 +0100 |
| commit | 79b02a3b5231c5b8cd31e50cd549968dd0a05c49 (patch) | |
| tree | b1f9b932e6f4718ee8880e84957ac73b0216a39d /target/arm/vfp.decode | |
| parent | 81f681106eabe21c55118a5a41999fb7387fb714 (diff) | |
target/arm: Convert VFP VLDR and VSTR to decodetree
Convert the VFP single load/store insns VLDR and VSTR to decodetree.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm/vfp.decode')
| -rw-r--r-- | target/arm/vfp.decode | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode index 134f1c9ef5..8fa7fa0bea 100644 --- a/target/arm/vfp.decode +++ b/target/arm/vfp.decode @@ -71,3 +71,10 @@ VMOV_64_sp ---- 1100 010 op:1 rt2:4 rt:4 1010 00.1 .... \ vm=%vm_sp VMOV_64_dp ---- 1100 010 op:1 rt2:4 rt:4 1011 00.1 .... \ vm=%vm_dp + +# Note that the half-precision variants of VLDR and VSTR are +# not part of this decodetree at all because they have bits [9:8] == 0b01 +VLDR_VSTR_sp ---- 1101 u:1 .0 l:1 rn:4 .... 1010 imm:8 \ + vd=%vd_sp +VLDR_VSTR_dp ---- 1101 u:1 .0 l:1 rn:4 .... 1011 imm:8 \ + vd=%vd_dp |