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authorPeter Maydell <peter.maydell@linaro.org>2021-06-14 16:09:13 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-06-16 14:33:52 +0100
commit375256a8460ae7310b053b52fe579c8832e73d10 (patch)
tree3c364420d1adc0f8923db6ea09a017974f83d491 /target/arm/translate.h
parentc485ce2c491a6e5d66da1d1555ecd474b450db98 (diff)
target/arm: Handle VPR semantics in existing code
When MVE is supported, the VPR register has a place on the exception stack frame in a previously reserved slot just above the FPSCR. It must also be zeroed in various situations when we invalidate FPU context. Update the code which handles the stack frames (exception entry and exit code, VLLDM, and VLSTM) to save/restore VPR. Update code which invalidates FP registers (mostly also exception entry and exit code, but also VSCCLRM and the code in full_vfp_access_check() that corresponds to the ExecuteFPCheck() pseudocode) to zero VPR. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210614151007.4545-4-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate.h')
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