diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2023-01-30 18:24:57 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2023-02-03 12:59:24 +0000 |
commit | 34a8a07e57bba6df2c1c67cc9bd3e80706ce4a54 (patch) | |
tree | bc565fb916896d2d55f38e0785b71cb42b91d334 /target/arm/translate.h | |
parent | 5572f7557fdd1b5c36aee899b7e86fda66c2babf (diff) |
target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps
Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 fine-grained traps.
These trap execution of the SVC instruction from AArch32 and AArch64.
(As usual, AArch32 can only trap from EL0, as fine grained traps are
disabled with an AArch32 EL1.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id: 20230130182459.3309057-22-peter.maydell@linaro.org
Message-id: 20230127175507.2895013-22-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate.h')
-rw-r--r-- | target/arm/translate.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/translate.h b/target/arm/translate.h index 62a7706eab..3717824b75 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -134,6 +134,8 @@ typedef struct DisasContext { bool fgt_active; /* True if fine-grained trap on ERET is enabled */ bool fgt_eret; + /* True if fine-grained trap on SVC is enabled */ + bool fgt_svc; /* * >= 0, a copy of PSTATE.BTYPE, which will be 0 without v8.5-BTI. * < 0, set by the current instruction. |