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authorRichard Henderson <richard.henderson@linaro.org>2022-06-20 10:51:52 -0700
committerPeter Maydell <peter.maydell@linaro.org>2022-06-27 11:18:17 +0100
commita3637e8882f9dbb00036ff77a88b841bd2580900 (patch)
treeed5b8dda8291d86f3df4abbe721731945344ab72 /target/arm/translate.h
parentd5b1223ac1ddf8f706f5e6feaaa526df8287f8b1 (diff)
target/arm: Add PSTATE.{SM,ZA} to TB flags
These are required to determine if various insns are allowed to issue. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.h')
-rw-r--r--target/arm/translate.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/translate.h b/target/arm/translate.h
index c88c953325..93766649f7 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -97,6 +97,10 @@ typedef struct DisasContext {
bool align_mem;
/* True if PSTATE.IL is set */
bool pstate_il;
+ /* True if PSTATE.SM is set. */
+ bool pstate_sm;
+ /* True if PSTATE.ZA is set. */
+ bool pstate_za;
/* True if MVE insns are definitely not predicated by VPR or LTPSIZE */
bool mve_no_pred;
/*