diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2022-04-17 10:43:41 -0700 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2022-04-22 14:44:54 +0100 |
commit | 099d1c20883a26e540086695559ca1e4dcd66fa1 (patch) | |
tree | cb9b0851c657b59d11b31e76ebe1e2668aeade0e /target/arm/translate.c | |
parent | fe12080c5f96f077552de92eb44ea2bb0588f51f (diff) |
target/arm: Simplify gen_sar
Use tcg_gen_umin_i32 instead of tcg_gen_movcond_i32.
Use tcg_constant_i32 while we're at it.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
-rw-r--r-- | target/arm/translate.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index 0c9d50d48d..086dc0d3b1 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -568,12 +568,10 @@ GEN_SHIFT(shr) static void gen_sar(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) { - TCGv_i32 tmp1, tmp2; - tmp1 = tcg_temp_new_i32(); + TCGv_i32 tmp1 = tcg_temp_new_i32(); + tcg_gen_andi_i32(tmp1, t1, 0xff); - tmp2 = tcg_const_i32(0x1f); - tcg_gen_movcond_i32(TCG_COND_GTU, tmp1, tmp1, tmp2, tmp2, tmp1); - tcg_temp_free_i32(tmp2); + tcg_gen_umin_i32(tmp1, tmp1, tcg_constant_i32(31)); tcg_gen_sar_i32(dest, t0, tmp1); tcg_temp_free_i32(tmp1); } |