diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2020-02-16 13:42:31 -0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-02-21 16:07:02 +0000 |
| commit | b9ed510e46f2f9e31e5e8adb4661d5d1cbe9a459 (patch) | |
| tree | 51ac8f0d0061dc8ac07d718418c800eeedee467c /target/arm/translate.c | |
| parent | a21bb78e5817be3f494922e1dadd6455fe5d6318 (diff) | |
target/arm: Convert PMULL.64 to gvec
The gvec form will be needed for implementing SVE2.
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200216214232.4230-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
| -rw-r--r-- | target/arm/translate.c | 16 |
1 files changed, 2 insertions, 14 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index e8f79899ca..57d61c4aa5 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5870,23 +5870,11 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) * outside the loop below as it only performs a single pass. */ if (op == 14 && size == 2) { - TCGv_i64 tcg_rn, tcg_rm, tcg_rd; - if (!dc_isar_feature(aa32_pmull, s)) { return 1; } - tcg_rn = tcg_temp_new_i64(); - tcg_rm = tcg_temp_new_i64(); - tcg_rd = tcg_temp_new_i64(); - neon_load_reg64(tcg_rn, rn); - neon_load_reg64(tcg_rm, rm); - gen_helper_neon_pmull_64_lo(tcg_rd, tcg_rn, tcg_rm); - neon_store_reg64(tcg_rd, rd); - gen_helper_neon_pmull_64_hi(tcg_rd, tcg_rn, tcg_rm); - neon_store_reg64(tcg_rd, rd + 1); - tcg_temp_free_i64(tcg_rn); - tcg_temp_free_i64(tcg_rm); - tcg_temp_free_i64(tcg_rd); + tcg_gen_gvec_3_ool(rd_ofs, rn_ofs, rm_ofs, 16, 16, + 0, gen_helper_gvec_pmull_q); return 0; } |