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authorRichard Henderson <richard.henderson@linaro.org>2019-04-17 14:28:57 -1000
committerRichard Henderson <richard.henderson@linaro.org>2019-05-13 22:52:08 +0000
commit4e027a710673f5d4dc6cff88728bcfd32e4c47b0 (patch)
tree8952e3d50b6b30adcee4c3b190d51a78a09d90ff /target/arm/translate.c
parenta456394ae540f852cd0d10fd693fe9f33598dc01 (diff)
target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
-rw-r--r--target/arm/translate.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index b25781554f..dd053c80d6 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -8120,6 +8120,9 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
case NEON_2RM_VNEG:
tcg_gen_gvec_neg(size, rd_ofs, rm_ofs, vec_size, vec_size);
break;
+ case NEON_2RM_VABS:
+ tcg_gen_gvec_abs(size, rd_ofs, rm_ofs, vec_size, vec_size);
+ break;
default:
elementwise:
@@ -8225,14 +8228,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
}
tcg_temp_free_i32(tmp2);
break;
- case NEON_2RM_VABS:
- switch(size) {
- case 0: gen_helper_neon_abs_s8(tmp, tmp); break;
- case 1: gen_helper_neon_abs_s16(tmp, tmp); break;
- case 2: tcg_gen_abs_i32(tmp, tmp); break;
- default: abort();
- }
- break;
case NEON_2RM_VCGT0_F:
{
TCGv_ptr fpstatus = get_fpstatus_ptr(1);