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authorRichard Henderson <richard.henderson@linaro.org>2019-09-04 12:30:40 -0700
committerPeter Maydell <peter.maydell@linaro.org>2019-09-05 13:23:03 +0100
commit6e8514ba408f3cc758cd47e2da5475d8684507ec (patch)
tree0699c424f3c5bee9a0b230094d3ba6640a5dd48e /target/arm/t16.decode
parent1cb1323433dca657a42483b2291c1ae923a91726 (diff)
target/arm: Convert T16 load/store multiple
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190904193059.26202-51-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/t16.decode')
-rw-r--r--target/arm/t16.decode8
1 files changed, 8 insertions, 0 deletions
diff --git a/target/arm/t16.decode b/target/arm/t16.decode
index 71b3e8f02e..a7a437f930 100644
--- a/target/arm/t16.decode
+++ b/target/arm/t16.decode
@@ -26,6 +26,7 @@
&ri !extern rd imm
&ldst_rr !extern p w u rn rt rm shimm shtype
&ldst_ri !extern p w u rn rt imm
+&ldst_block !extern rn i b u w list
# Set S if the instruction is outside of an IT block.
%s !function=t16_setflags
@@ -109,3 +110,10 @@ LDR_ri 10011 ... ........ @ldst_spec_i rn=13
ADR 10100 rd:3 ........ imm=%imm8_0x4
ADD_rri 10101 rd:3 ........ \
&s_rri_rot rn=13 s=0 rot=0 imm=%imm8_0x4 # SP
+
+# Load/store multiple
+
+@ldstm ..... rn:3 list:8 &ldst_block i=1 b=0 u=0 w=1
+
+STM 11000 ... ........ @ldstm
+LDM_t16 11001 ... ........ @ldstm