diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2018-06-29 15:11:11 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2018-06-29 15:11:11 +0100 |
commit | a21035822e67000b4849e31935d0ecc39a96bb9f (patch) | |
tree | e45670718463279a54a0487e5a91c1808effe8c3 /target/arm/sve.decode | |
parent | ec5b375bb5a0e35c0c21dc9dd1d82894269ce215 (diff) |
target/arm: Implement SVE MOVPRFX
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-28-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/sve.decode')
-rw-r--r-- | target/arm/sve.decode | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/sve.decode b/target/arm/sve.decode index 2aca9f0bb0..c725ee2584 100644 --- a/target/arm/sve.decode +++ b/target/arm/sve.decode @@ -270,6 +270,10 @@ ORV 00000100 .. 011 000 001 ... ..... ..... @rd_pg_rn EORV 00000100 .. 011 001 001 ... ..... ..... @rd_pg_rn ANDV 00000100 .. 011 010 001 ... ..... ..... @rd_pg_rn +# SVE constructive prefix (predicated) +MOVPRFX_z 00000100 .. 010 000 001 ... ..... ..... @rd_pg_rn +MOVPRFX_m 00000100 .. 010 001 001 ... ..... ..... @rd_pg_rn + # SVE integer add reduction (predicated) # Note that saddv requires size != 3. UADDV 00000100 .. 000 001 001 ... ..... ..... @rd_pg_rn @@ -418,6 +422,9 @@ ADR_p64 00000100 11 1 ..... 1010 .. ..... ..... @rd_rn_msz_rm ### SVE Integer Misc - Unpredicated Group +# SVE constructive prefix (unpredicated) +MOVPRFX 00000100 00 1 00000 101111 rn:5 rd:5 + # SVE floating-point exponential accelerator # Note esz != 0 FEXPA 00000100 .. 1 00000 101110 ..... ..... @rd_rn |