diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2018-06-15 14:57:15 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2018-06-15 15:23:34 +0100 |
commit | 29b80469dc51ae4064e9ef9223967882d2610523 (patch) | |
tree | f38bd966e573e468b6988364294d8bd28029f6eb /target/arm/sve.decode | |
parent | 6e6a157d683058d86a224cf128320d67b0915365 (diff) |
target/arm: Implement SVE Floating Point Arithmetic - Unpredicated Group
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/sve.decode')
-rw-r--r-- | target/arm/sve.decode | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/sve.decode b/target/arm/sve.decode index eee8726bdf..6f436f9096 100644 --- a/target/arm/sve.decode +++ b/target/arm/sve.decode @@ -648,6 +648,16 @@ UMIN_zzi 00100101 .. 101 011 110 ........ ..... @rdn_i8u # SVE integer multiply immediate (unpredicated) MUL_zzi 00100101 .. 110 000 110 ........ ..... @rdn_i8s +### SVE Floating Point Arithmetic - Unpredicated Group + +# SVE floating-point arithmetic (unpredicated) +FADD_zzz 01100101 .. 0 ..... 000 000 ..... ..... @rd_rn_rm +FSUB_zzz 01100101 .. 0 ..... 000 001 ..... ..... @rd_rn_rm +FMUL_zzz 01100101 .. 0 ..... 000 010 ..... ..... @rd_rn_rm +FTSMUL 01100101 .. 0 ..... 000 011 ..... ..... @rd_rn_rm +FRECPS 01100101 .. 0 ..... 000 110 ..... ..... @rd_rn_rm +FRSQRTS 01100101 .. 0 ..... 000 111 ..... ..... @rd_rn_rm + ### SVE Memory - 32-bit Gather and Unsized Contiguous Group # SVE load predicate register |