aboutsummaryrefslogtreecommitdiff
path: root/target/arm/sme.decode
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2022-07-08 20:45:15 +0530
committerPeter Maydell <peter.maydell@linaro.org>2022-07-11 13:19:35 +0100
commit7390e0e9ab8475b7d291b70b05d484827ec9f3e2 (patch)
tree971574abf202d7de845320c562bd51b1e8eae575 /target/arm/sme.decode
parente9ad3ef19ee4af62152fdc7f1150bf59a7f997d0 (diff)
target/arm: Implement SME LD1, ST1
We cannot reuse the SVE functions for LD[1-4] and ST[1-4], because those functions accept only a Zreg register number. For SME, we want to pass a pointer into ZA storage. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-21-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/sme.decode')
-rw-r--r--target/arm/sme.decode9
1 files changed, 9 insertions, 0 deletions
diff --git a/target/arm/sme.decode b/target/arm/sme.decode
index 241b4895b7..900e3f2a07 100644
--- a/target/arm/sme.decode
+++ b/target/arm/sme.decode
@@ -37,3 +37,12 @@ MOVA 11000000 esz:2 00001 0 v:1 .. pg:3 0 za_imm:4 zr:5 \
&mova to_vec=1 rs=%mova_rs
MOVA 11000000 11 00001 1 v:1 .. pg:3 0 za_imm:4 zr:5 \
&mova to_vec=1 rs=%mova_rs esz=4
+
+### SME Memory
+
+&ldst esz rs pg rn rm za_imm v:bool st:bool
+
+LDST1 1110000 0 esz:2 st:1 rm:5 v:1 .. pg:3 rn:5 0 za_imm:4 \
+ &ldst rs=%mova_rs
+LDST1 1110000 111 st:1 rm:5 v:1 .. pg:3 rn:5 0 za_imm:4 \
+ &ldst esz=4 rs=%mova_rs