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authorRichard Henderson <richard.henderson@linaro.org>2022-08-22 08:26:45 -0700
committerPeter Maydell <peter.maydell@linaro.org>2022-09-22 16:38:27 +0100
commit652c750ee5c57ba3bbaf32e5ebb77fbbc8f68385 (patch)
tree3beab0020ee25127753a2f187bee935c1a9b09c3 /target/arm/ptw.c
parentd2c92e585619516d7d29d38de3acba206806e64c (diff)
target/arm: Remove is_subpage argument to pmsav8_mpu_lookup
This can be made redundant with result->page_size, by moving the basic set of page_size from get_phys_addr_pmsav8. We still need to overwrite page_size when v8m_security_lookup signals a subpage. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-11-richard.henderson@linaro.org [PMM: Update a comment that used to refer to is_subpage] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/ptw.c')
-rw-r--r--target/arm/ptw.c23
1 files changed, 12 insertions, 11 deletions
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index d6890048f1..bb3c709f8f 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -1701,8 +1701,8 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx,
- GetPhysAddrResult *result, bool *is_subpage,
- ARMMMUFaultInfo *fi, uint32_t *mregion)
+ GetPhysAddrResult *result, ARMMMUFaultInfo *fi,
+ uint32_t *mregion)
{
/*
* Perform a PMSAv8 MPU lookup (without also doing the SAU check
@@ -1710,8 +1710,9 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
* mregion is (if not NULL) set to the region number which matched,
* or -1 if no region number is returned (MPU off, address did not
* hit a region, address hit in multiple regions).
- * We set is_subpage to true if the region hit doesn't cover the
- * entire TARGET_PAGE the address is within.
+ * If the region hit doesn't cover the entire TARGET_PAGE the address
+ * is within, then we set the result page_size to 1 to force the
+ * memory system to use a subpage.
*/
ARMCPU *cpu = env_archcpu(env);
bool is_user = regime_is_user(env, mmu_idx);
@@ -1722,7 +1723,7 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
uint32_t addr_page_base = address & TARGET_PAGE_MASK;
uint32_t addr_page_limit = addr_page_base + (TARGET_PAGE_SIZE - 1);
- *is_subpage = false;
+ result->page_size = TARGET_PAGE_SIZE;
result->phys = address;
result->prot = 0;
if (mregion) {
@@ -1774,13 +1775,13 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
ranges_overlap(base, limit - base + 1,
addr_page_base,
TARGET_PAGE_SIZE)) {
- *is_subpage = true;
+ result->page_size = 1;
}
continue;
}
if (base > addr_page_base || limit < addr_page_limit) {
- *is_subpage = true;
+ result->page_size = 1;
}
if (matchregion != -1) {
@@ -1972,7 +1973,6 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
uint32_t secure = regime_is_secure(env, mmu_idx);
V8M_SAttributes sattrs = {};
bool ret;
- bool mpu_is_subpage;
if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {
v8m_security_lookup(env, address, access_type, mmu_idx, &sattrs);
@@ -2035,9 +2035,10 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
}
ret = pmsav8_mpu_lookup(env, address, access_type, mmu_idx,
- result, &mpu_is_subpage, fi, NULL);
- result->page_size =
- sattrs.subpage || mpu_is_subpage ? 1 : TARGET_PAGE_SIZE;
+ result, fi, NULL);
+ if (sattrs.subpage) {
+ result->page_size = 1;
+ }
return ret;
}