diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-06-08 19:38:51 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-06-08 19:38:51 +0100 |
| commit | 4c74ab157b056710b043a02c8101c449c179ae11 (patch) | |
| tree | 985c8c3f8c9c63cd2313123cef01766bdd4166e1 /target/arm/ptw.c | |
| parent | 47ff5ba9d08c2c769794a59b88f1c19ada004730 (diff) | |
target/arm: Move get_level1_table_address to ptw.c
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220604040607.269301-14-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/ptw.c')
| -rw-r--r-- | target/arm/ptw.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 32ba2e5e8b..5737a3976b 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -15,6 +15,29 @@ #include "ptw.h" +static bool get_level1_table_address(CPUARMState *env, ARMMMUIdx mmu_idx, + uint32_t *table, uint32_t address) +{ + /* Note that we can only get here for an AArch32 PL0/PL1 lookup */ + TCR *tcr = regime_tcr(env, mmu_idx); + + if (address & tcr->mask) { + if (tcr->raw_tcr & TTBCR_PD1) { + /* Translation table walk disabled for TTBR1 */ + return false; + } + *table = regime_ttbr(env, mmu_idx, 1) & 0xffffc000; + } else { + if (tcr->raw_tcr & TTBCR_PD0) { + /* Translation table walk disabled for TTBR0 */ + return false; + } + *table = regime_ttbr(env, mmu_idx, 0) & tcr->base_mask; + } + *table |= (address >> 18) & 0x3ffc; + return true; +} + static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, hwaddr *phys_ptr, int *prot, |