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authorMichael Davidsaver <mdavidsaver@gmail.com>2017-06-02 11:51:48 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-06-02 11:51:48 +0100
commit29c483a506070e8f554c77d22686f405e30b9114 (patch)
treed0c36f71539d865a154f8c1c7ba4ce6c76ef14ab /target/arm/machine.c
parent5dd0641d234e355597be62e5279d8a519c831625 (diff)
arm: add MPU support to M profile CPUs
The M series MPU is almost the same as the already implemented R profile MPU (v7 PMSA). So all we need to implement here is the MPU register interface in the system register space. This implementation has the same restriction as the R profile MPU that it doesn't permit regions to be sized down smaller than 1K. We also do not yet implement support for MPU_CTRL.HFNMIENA; this bit should if zero disable use of the MPU when running HardFault, NMI or with FAULTMASK set to 1 (ie at an execution priority of less than zero) -- if the MPU is enabled we don't treat these cases any differently. Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com> Message-id: 1493122030-32191-13-git-send-email-peter.maydell@linaro.org [PMM: Keep all the bits in mpu_ctrl field, rather than using SCTLR bits for them; drop broken HFNMIENA support; various cleanup] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/machine.c')
-rw-r--r--target/arm/machine.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/target/arm/machine.c b/target/arm/machine.c
index ac6b758e3b..1a40469015 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -99,8 +99,8 @@ static bool m_needed(void *opaque)
static const VMStateDescription vmstate_m = {
.name = "cpu/m",
- .version_id = 3,
- .minimum_version_id = 3,
+ .version_id = 4,
+ .minimum_version_id = 4,
.needed = m_needed,
.fields = (VMStateField[]) {
VMSTATE_UINT32(env.v7m.vecbase, ARMCPU),
@@ -112,6 +112,7 @@ static const VMStateDescription vmstate_m = {
VMSTATE_UINT32(env.v7m.dfsr, ARMCPU),
VMSTATE_UINT32(env.v7m.mmfar, ARMCPU),
VMSTATE_UINT32(env.v7m.bfar, ARMCPU),
+ VMSTATE_UINT32(env.v7m.mpu_ctrl, ARMCPU),
VMSTATE_INT32(env.v7m.exception, ARMCPU),
VMSTATE_END_OF_LIST()
}