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authorPeter Maydell <peter.maydell@linaro.org>2022-01-22 18:24:31 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-01-28 14:29:47 +0000
commitfc6177af1137789dccb9e257bfae778d18381f90 (patch)
tree60823cd0668d466715f226325b64042a5088dd12 /target/arm/m_helper.c
parent0166f5c46627b872a9d26eae8ded4be45263a321 (diff)
target/arm: Log CPU index in 'Taking exception' log
In an SMP system it can be unclear which CPU is taking an exception; add the CPU index (which is the same value used in the TCG 'Trace %d:' logging) to the "Taking exception" log line to clarify it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220122182444.724087-2-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/m_helper.c')
-rw-r--r--target/arm/m_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index 2c9922dc29..b11e927df1 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -2206,7 +2206,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
uint32_t lr;
bool ignore_stackfaults;
- arm_log_exception(cs->exception_index);
+ arm_log_exception(cs);
/*
* For exceptions we just mark as pending on the NVIC, and let that