diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2017-09-14 18:43:17 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-09-14 18:43:17 +0100 |
commit | 4d1e7a4745c050f7ccac49a1c01437526b5130b5 (patch) | |
tree | 86add4663acf2e3d762a4d38790e5ac9a1cd43d7 /target/arm/internals.h | |
parent | 7115cdf5782922611bcc44c89eec5990db7f6466 (diff) |
target/arm: Add and use defines for EXCRET constants
The exception-return magic values get some new bits in v8M, which
makes some bit definitions for them worthwhile.
We don't use the bit definitions for the switch on the low bits
which checks the return type for v7M, because this is defined
in the v7M ARM ARM as a set of valid values rather than via
per-bit checks.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: 1505137930-13255-7-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/internals.h')
-rw-r--r-- | target/arm/internals.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h index a315354cfd..18be3702f2 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -61,6 +61,16 @@ FIELD(V7M_CONTROL, NPRIV, 0, 1) FIELD(V7M_CONTROL, SPSEL, 1, 1) FIELD(V7M_CONTROL, FPCA, 2, 1) +/* Bit definitions for v7M exception return payload */ +FIELD(V7M_EXCRET, ES, 0, 1) +FIELD(V7M_EXCRET, RES0, 1, 1) +FIELD(V7M_EXCRET, SPSEL, 2, 1) +FIELD(V7M_EXCRET, MODE, 3, 1) +FIELD(V7M_EXCRET, FTYPE, 4, 1) +FIELD(V7M_EXCRET, DCRS, 5, 1) +FIELD(V7M_EXCRET, S, 6, 1) +FIELD(V7M_EXCRET, RES1, 7, 25) /* including the must-be-1 prefix */ + /* * For AArch64, map a given EL to an index in the banked_spsr array. * Note that this mapping and the AArch32 mapping defined in bank_number() |