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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-10-10 20:18:50 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-10-20 11:27:49 +0100 |
| commit | 937f2245596de9026ca8ae017ef47889523c4326 (patch) | |
| tree | ce28803c3bcb9c174a0d3b2a849c5a4a0e44b197 /target/arm/internals.h | |
| parent | b8967ddf393aaf35fdbc07b4cb538a40f8b6fe37 (diff) | |
target/arm: Use probe_access_full for BTI
Add a field to TARGET_PAGE_ENTRY_EXTRA to hold the guarded bit.
In is_guarded_page, use probe_access_full instead of just guessing
that the tlb entry is still present. Also handles the FIXME about
executing from device memory.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221011031911.2408754-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/internals.h')
| -rw-r--r-- | target/arm/internals.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h index 9566364dca..c3c3920ded 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1095,6 +1095,7 @@ typedef struct ARMCacheAttrs { unsigned int attrs:8; unsigned int shareability:2; /* as in the SH field of the VMSAv8-64 PTEs */ bool is_s2_format:1; + bool guarded:1; /* guarded bit of the v8-64 PTE */ } ARMCacheAttrs; /* Fields that are valid upon success. */ |