diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2019-01-21 10:23:11 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-01-21 10:38:53 +0000 |
commit | 7469f6c696d74ad3b22b67c08e1e8f79e2b5d3d6 (patch) | |
tree | a03b9f0ffdda1667fd391f666c51308e59e6c899 /target/arm/internals.h | |
parent | 0816ef1bfcd3ac53e7454b62ca436727887f6056 (diff) |
target/arm: Introduce raise_exception_ra
This path uses cpu_loop_exit_restore to unwind current processor state.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20190108223129.5570-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/internals.h')
-rw-r--r-- | target/arm/internals.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h index 78e026d6e9..c01a3f8c96 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -104,6 +104,13 @@ void QEMU_NORETURN raise_exception(CPUARMState *env, uint32_t excp, uint32_t syndrome, uint32_t target_el); /* + * Similarly, but also use unwinding to restore cpu state. + */ +void QEMU_NORETURN raise_exception_ra(CPUARMState *env, uint32_t excp, + uint32_t syndrome, uint32_t target_el, + uintptr_t ra); + +/* * For AArch64, map a given EL to an index in the banked_spsr array. * Note that this mapping and the AArch32 mapping defined in bank_number() * must agree such that the AArch64<->AArch32 SPSRs have the architecturally |