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authorPeter Maydell <peter.maydell@linaro.org>2018-01-16 13:28:11 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-01-16 13:28:11 +0000
commit3b39d734141a71296d08af3d4c32f872fafd782e (patch)
tree658e17f03ec8749b5cb72b635628ddb2355bf816 /target/arm/internals.h
parenta2a051591c599172993c07043e13e499736ed193 (diff)
target/arm: Handle page table walk load failures correctly
Instead of ignoring the response from address_space_ld*() (indicating an attempt to read a page table descriptor from an invalid physical address), use it to report the failure correctly. Since this is another couple of locations where we need to decide the value of the ARMMMUFaultInfo ea bit based on a MemTxResult, we factor out that operation into a helper function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/internals.h')
-rw-r--r--target/arm/internals.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 876854d876..89f5d2fe12 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -687,6 +687,16 @@ static inline uint32_t arm_fi_to_lfsc(ARMMMUFaultInfo *fi)
return fsc;
}
+static inline bool arm_extabort_type(MemTxResult result)
+{
+ /* The EA bit in syndromes and fault status registers is an
+ * IMPDEF classification of external aborts. ARM implementations
+ * usually use this to indicate AXI bus Decode error (0) or
+ * Slave error (1); in QEMU we follow that.
+ */
+ return result != MEMTX_DECODE_ERROR;
+}
+
/* Do a page table walk and add page to TLB if possible */
bool arm_tlb_fill(CPUState *cpu, vaddr address,
MMUAccessType access_type, int mmu_idx,