diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2022-10-21 17:01:31 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2022-10-27 10:27:23 +0100 |
commit | e4c93e44ab103f6c67abd85d620343f61aafa004 (patch) | |
tree | 29ff31acaafd54705245a67e216b2e0cca8fc3e3 /target/arm/internals.h | |
parent | 344744e148e6e865f5a57e745b02a87e5ea534ad (diff) |
target/arm: Implement FEAT_E0PD
FEAT_E0PD adds new bits E0PD0 and E0PD1 to TCR_EL1, which allow the
OS to forbid EL0 access to half of the address space. Since this is
an EL0-specific variation on the existing TCR_ELx.{EPD0,EPD1}, we can
implement it entirely in aa64_va_parameters().
This requires moving the existing regime_is_user() to internals.h
so that the code in helper.c can get at it.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221021160131.3531787-1-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/internals.h')
-rw-r--r-- | target/arm/internals.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h index b26c9ca17b..1926f3679c 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -707,6 +707,25 @@ static inline uint32_t regime_el(CPUARMState *env, ARMMMUIdx mmu_idx) } } +static inline bool regime_is_user(CPUARMState *env, ARMMMUIdx mmu_idx) +{ + switch (mmu_idx) { + case ARMMMUIdx_E20_0: + case ARMMMUIdx_Stage1_E0: + case ARMMMUIdx_MUser: + case ARMMMUIdx_MSUser: + case ARMMMUIdx_MUserNegPri: + case ARMMMUIdx_MSUserNegPri: + return true; + default: + return false; + case ARMMMUIdx_E10_0: + case ARMMMUIdx_E10_1: + case ARMMMUIdx_E10_1_PAN: + g_assert_not_reached(); + } +} + /* Return the SCTLR value which controls this address translation regime */ static inline uint64_t regime_sctlr(CPUARMState *env, ARMMMUIdx mmu_idx) { |