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authorPeter Maydell <peter.maydell@linaro.org>2017-12-14 14:22:17 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-12-14 14:22:18 +0000
commit5705b536b597de00d82807bf14bb38f542aa4491 (patch)
treebe24d1a3be79ab06c85f848b6e808af41d8533b7 /target/arm/helper.h
parentf44cedc9166d89c73287c038311a989fb3c39e03 (diff)
parentd3c348b6e3af3598bfcb755d59f8f4de80a2228a (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20171213' into staging
target-arm queue: * xilinx_spips: set reset values correctly * MAINTAINERS: fix an email address * hw/display/tc6393xb: limit irq handler index to TC6393XB_GPIOS * nvic: Make systick banked for v8M * refactor get_phys_addr() so we can return the right format PAR for ATS operations * implement v8M TT instruction * fix some minor v8M bugs * Implement reset for GICv3 ITS * xlnx-zcu102: Add support for the ZynqMP QSPI # gpg: Signature made Wed 13 Dec 2017 18:01:31 GMT # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20171213: (43 commits) xilinx_spips: Use memset instead of a for loop to zero registers xilinx_spips: Set all of the reset values xilinx_spips: Update the QSPI Mod ID reset value MAINTAINERS: replace the unavailable email address hw/display/tc6393xb: limit irq handler index to TC6393XB_GPIOS nvic: Make systick banked nvic: Make nvic_sysreg_ns_ops work with any MemoryRegion target/arm: Extend PAR format determination target/arm: Remove fsr argument from get_phys_addr() and arm_tlb_fill() target/arm: Ignore fsr from get_phys_addr() in do_ats_write() target/arm: Use ARMMMUFaultInfo in deliver_fault() target/arm: Convert get_phys_addr_pmsav8() to not return FSC values target/arm: Convert get_phys_addr_pmsav7() to not return FSC values target/arm: Convert get_phys_addr_pmsav5() to not return FSC values target/arm: Convert get_phys_addr_lpae() to not return FSC values target/arm: Convert get_phys_addr_v6() to not return FSC values target/arm: Convert get_phys_addr_v5() to not return FSC values target/arm: Remove fsr argument from arm_ld*_ptw() target/arm: Provide fault type enum and FSR conversion functions target/arm: Implement TT instruction ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/helper.h')
-rw-r--r--target/arm/helper.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 439d228420..066729e8ad 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -66,6 +66,8 @@ DEF_HELPER_2(v7m_mrs, i32, env, i32)
DEF_HELPER_2(v7m_bxns, void, env, i32)
DEF_HELPER_2(v7m_blxns, void, env, i32)
+DEF_HELPER_3(v7m_tt, i32, env, i32, i32)
+
DEF_HELPER_4(access_check_cp_reg, void, env, ptr, i32, i32)
DEF_HELPER_3(set_cp_reg, void, env, ptr, i32)
DEF_HELPER_2(get_cp_reg, i32, env, ptr)