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authorPeter Maydell <peter.maydell@linaro.org>2018-10-08 14:55:04 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-10-08 14:55:04 +0100
commit4730fb85035e99c909db7d14ef76cd17f28f4423 (patch)
treeb3350a61e2e7e0e5f0afebb1fdb50ca37310f918 /target/arm/helper.c
parent500d04843ba953dc4560e44f04001efec38c14a6 (diff)
target/arm: Define new TBFLAG for v8M stack checking
The Arm v8M architecture includes hardware stack limit checking. When certain instructions update the stack pointer, if the new value of SP is below the limit set in the associated limit register then an exception is taken. Add a TB flag that tracks whether the limit-checking code needs to be emitted. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20181002163556.10279-2-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/helper.c')
-rw-r--r--target/arm/helper.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index efe42f9e07..0807173eac 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -12686,6 +12686,16 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
flags |= ARM_TBFLAG_HANDLER_MASK;
}
+ /* v8M always applies stack limit checks unless CCR.STKOFHFNMIGN is
+ * suppressing them because the requested execution priority is less than 0.
+ */
+ if (arm_feature(env, ARM_FEATURE_V8) &&
+ arm_feature(env, ARM_FEATURE_M) &&
+ !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) &&
+ (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) {
+ flags |= ARM_TBFLAG_STACKCHECK_MASK;
+ }
+
*pflags = flags;
*cs_base = 0;
}