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authorPeter Maydell <peter.maydell@linaro.org>2017-01-27 15:20:24 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-01-27 15:29:08 +0000
commit7517748e3f71a3099e57915fba95c4c308e6d842 (patch)
treec575fc1e87c83fffe1815a504e55542c98dda800 /target/arm/helper.c
parent81dd9648c69bb89afdd6f4bb3ed6f3efdac96524 (diff)
armv7m: Report no-coprocessor faults correctly
For v7M attempts to access a nonexistent coprocessor are reported differently from plain undefined instructions (as UsageFaults of type NOCP rather than type UNDEFINSTR). Split them out into a new EXCP_NOCP so we can report the FSR value correctly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1485285380-10565-8-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/helper.c')
-rw-r--r--target/arm/helper.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index e6b1c36a95..c23df1b133 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6074,6 +6074,10 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
env->v7m.cfsr |= R_V7M_CFSR_UNDEFINSTR_MASK;
return;
+ case EXCP_NOCP:
+ armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
+ env->v7m.cfsr |= R_V7M_CFSR_NOCP_MASK;
+ return;
case EXCP_SWI:
/* The PC already points to the next instruction. */
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC);