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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-05-14 15:23:35 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-05-14 15:23:35 +0100 |
| commit | 0ffd3d64bd1bb8b84950e52159a0062fdab34628 (patch) | |
| tree | 6c546aa031c5e4b4536494e534ff431d1d1026ab /target/arm/gdbstub.c | |
| parent | 035b448b84f3557206abc44d786c5d3db2638f7d (diff) | |
| parent | 2ead1b18ca1bbc41c09a82d980e1e5f53afa08eb (diff) | |
Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2020-05-14.for-upstream' into staging
Upstream
# gpg: Signature made Thu 14 May 2020 15:04:44 BST
# gpg: using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
# gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [full]
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83
* remotes/edgar/tags/edgar/xilinx-next-2020-05-14.for-upstream:
target/microblaze: monitor: Increase the number of registers reported
target/microblaze: gdb: Fix incorrect SReg reporting
target/microblaze: gdb: Extend the number of registers presented to GDB
target/microblaze: Fix FPU2 instruction check
target/microblaze: Add MFS Rd,EDR translation
MAINTAINERS: Add myself as streams maintainer
hw/dma/xilinx_axidma: s2mm: Support stream fragments
hw/dma/xilinx_axidma: mm2s: Stream descriptor by descriptor
hw/net/xilinx_axienet: Handle fragmented packets from DMA
hw/core: stream: Add an end-of-packet flag
hw/dma/xilinx_axidma: Add DMA memory-region property
hw/net/xilinx_axienet: Remove unncessary cast
hw/net/xilinx_axienet: Cleanup stream->push assignment
hw/net/xilinx_axienet: Auto-clear PHY Autoneg
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/gdbstub.c')
0 files changed, 0 insertions, 0 deletions