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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-10-21 10:37:39 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-10-27 10:44:02 +0000 |
| commit | be5d6f4884021208ae0e73379c83e51500ad3a8d (patch) | |
| tree | 900f37df4b572acc462d978b0653f29a8e60c029 /target/arm/cpu.h | |
| parent | 0b6a03c044b6b0b09ad590c0d8b1bc60f12b9612 (diff) | |
linux-user: Set PAGE_TARGET_1 for TARGET_PROT_BTI
Transform the prot bit to a qemu internal page bit, and save
it in the page tables.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201021173749.111103-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 49cd5cabcf..c18a916766 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3446,6 +3446,11 @@ static inline MemTxAttrs *typecheck_memtxattrs(MemTxAttrs *x) #define arm_tlb_mte_tagged(x) (typecheck_memtxattrs(x)->target_tlb_bit1) /* + * AArch64 usage of the PAGE_TARGET_* bits for linux-user. + */ +#define PAGE_BTI PAGE_TARGET_1 + +/* * Naming convention for isar_feature functions: * Functions which test 32-bit ID registers should have _aa32_ in * their name. Functions which test 64-bit ID registers should have |