diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-10-10 20:18:49 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-10-20 11:27:49 +0100 |
| commit | b8967ddf393aaf35fdbc07b4cb538a40f8b6fe37 (patch) | |
| tree | 12e43e773e740f7e1407d717ac9b7c3ab1272da8 /target/arm/cpu.h | |
| parent | 24d18d5d7e31462b7bd5bb2c6ee19856699e34ed (diff) | |
target/arm: Use probe_access_full for MTE
The CPUTLBEntryFull structure now stores the original pte attributes, as
well as the physical address. Therefore, we no longer need a separate
bit in MemTxAttrs, nor do we need to walk the tree of memory regions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221011031911.2408754-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index e3dbef5be8..9a358c410b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3400,7 +3400,6 @@ static inline MemTxAttrs *typecheck_memtxattrs(MemTxAttrs *x) * generic target bits directly. */ #define arm_tlb_bti_gp(x) (typecheck_memtxattrs(x)->target_tlb_bit0) -#define arm_tlb_mte_tagged(x) (typecheck_memtxattrs(x)->target_tlb_bit1) /* * AArch64 usage of the PAGE_TARGET_* bits for linux-user. |