diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2020-09-10 18:38:51 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-10-01 15:31:00 +0100 |
| commit | 0ae0326b984e77a55c224b7863071bd3d8951231 (patch) | |
| tree | 2ec89f8faee13ce2fea173cb596ce4a0b3a1d2d5 /target/arm/cpu.c | |
| parent | 37a712a0f969ca2df7f01182409a6c4825cebfb5 (diff) | |
target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check
The ARM_FEATURE_PXN bit indicates whether the CPU supports the PXN
bit in short-descriptor translation table format descriptors. This
is indicated by ID_MMFR0.VMSA being at least 0b0100. Replace the
feature bit with an ID register check, in line with our preference
for ID register checks over feature bits.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200910173855.4068-2-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.c')
| -rw-r--r-- | target/arm/cpu.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a7643deab4..d13a7b8717 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1588,7 +1588,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) } if (arm_feature(env, ARM_FEATURE_LPAE)) { set_feature(env, ARM_FEATURE_V7MP); - set_feature(env, ARM_FEATURE_PXN); } if (arm_feature(env, ARM_FEATURE_CBAR_RO)) { set_feature(env, ARM_FEATURE_CBAR); |