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authorPeter Maydell <peter.maydell@linaro.org>2024-01-09 14:43:57 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-01-09 14:44:45 +0000
commite2862554c257e908a3833265e38365e794abd362 (patch)
tree3baf667dbb1e66b667c3f612cde341bf5ebeb8f4 /target/arm/cpu.c
parent3b32140e706b586a0b17050f99ffc812c8849bd0 (diff)
target/arm: Add FEAT_NV2 to max, neoverse-n2, neoverse-v1 CPUs
Enable FEAT_NV2 on the 'max' CPU, and stop filtering it out for the Neoverse N2 and Neoverse V1 CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Miguel Luis <miguel.luis@oracle.com>
Diffstat (limited to 'target/arm/cpu.c')
-rw-r--r--target/arm/cpu.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 7d763786d8..826ce842c0 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2243,11 +2243,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
/* FEAT_MPAM (Memory Partitioning and Monitoring Extension) */
cpu->isar.id_aa64pfr0 =
FIELD_DP64(cpu->isar.id_aa64pfr0, ID_AA64PFR0, MPAM, 0);
- /* FEAT_NV2 (Enhanced Nested Virtualization support) */
- if (FIELD_EX64(cpu->isar.id_aa64mmfr2, ID_AA64MMFR2, NV) > 1) {
- cpu->isar.id_aa64mmfr2 =
- FIELD_DP64(cpu->isar.id_aa64mmfr2, ID_AA64MMFR2, NV, 1);
- }
}
/* MPU can be configured out of a PMSA CPU either by setting has-mpu