aboutsummaryrefslogtreecommitdiff
path: root/target/arm/cpu.c
diff options
context:
space:
mode:
authorClaudio Fontana <cfontana@suse.de>2021-02-04 17:39:23 +0100
committerRichard Henderson <richard.henderson@linaro.org>2021-02-05 10:24:15 -1000
commit78271684719f34c1cc19f895e089f2f19b69698d (patch)
tree5f47406eb8c2be4e37e411e5053678e4d91e09d3 /target/arm/cpu.c
parentc73bdb35a91fb6b17c2c93b1ba381fc88a406f8d (diff)
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
we cannot in principle make the TCG Operations field definitions conditional on CONFIG_TCG in code that is included by both common_ss and specific_ss modules. Therefore, what we can do safely to restrict the TCG fields to TCG-only builds, is to move all tcg cpu operations into a separate header file, which is only included by TCG, target-specific code. This leaves just a NULL pointer in the cpu.h for the non-TCG builds. This also tidies up the code in all targets a bit, having all TCG cpu operations neatly contained by a dedicated data struct. Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210204163931.7358-16-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm/cpu.c')
-rw-r--r--target/arm/cpu.c41
1 files changed, 26 insertions, 15 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index c9a66d3103..8ddb2556f8 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -26,6 +26,9 @@
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "cpu.h"
+#ifdef CONFIG_TCG
+#include "hw/core/tcg-cpu-ops.h"
+#endif /* CONFIG_TCG */
#include "internals.h"
#include "exec/exec-all.h"
#include "hw/qdev-properties.h"
@@ -55,8 +58,8 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value)
}
#ifdef CONFIG_TCG
-static void arm_cpu_synchronize_from_tb(CPUState *cs,
- const TranslationBlock *tb)
+void arm_cpu_synchronize_from_tb(CPUState *cs,
+ const TranslationBlock *tb)
{
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
@@ -590,7 +593,7 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
found:
cs->exception_index = excp_idx;
env->exception.target_el = target_el;
- cc->tcg_ops.do_interrupt(cs);
+ cc->tcg_ops->do_interrupt(cs);
return true;
}
@@ -2242,6 +2245,24 @@ static gchar *arm_gdb_arch_name(CPUState *cs)
return g_strdup("arm");
}
+#ifdef CONFIG_TCG
+static struct TCGCPUOps arm_tcg_ops = {
+ .initialize = arm_translate_init,
+ .synchronize_from_tb = arm_cpu_synchronize_from_tb,
+ .cpu_exec_interrupt = arm_cpu_exec_interrupt,
+ .tlb_fill = arm_cpu_tlb_fill,
+ .debug_excp_handler = arm_debug_excp_handler,
+
+#if !defined(CONFIG_USER_ONLY)
+ .do_interrupt = arm_cpu_do_interrupt,
+ .do_transaction_failed = arm_cpu_do_transaction_failed,
+ .do_unaligned_access = arm_cpu_do_unaligned_access,
+ .adjust_watchpoint_address = arm_adjust_watchpoint_address,
+ .debug_check_watchpoint = arm_debug_check_watchpoint,
+#endif /* !CONFIG_USER_ONLY */
+};
+#endif /* CONFIG_TCG */
+
static void arm_cpu_class_init(ObjectClass *oc, void *data)
{
ARMCPUClass *acc = ARM_CPU_CLASS(oc);
@@ -2274,19 +2295,9 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_get_dynamic_xml = arm_gdb_get_dynamic_xml;
cc->gdb_stop_before_watchpoint = true;
cc->disas_set_info = arm_disas_set_info;
+
#ifdef CONFIG_TCG
- cc->tcg_ops.initialize = arm_translate_init;
- cc->tcg_ops.cpu_exec_interrupt = arm_cpu_exec_interrupt;
- cc->tcg_ops.synchronize_from_tb = arm_cpu_synchronize_from_tb;
- cc->tcg_ops.tlb_fill = arm_cpu_tlb_fill;
- cc->tcg_ops.debug_excp_handler = arm_debug_excp_handler;
-#if !defined(CONFIG_USER_ONLY)
- cc->tcg_ops.do_interrupt = arm_cpu_do_interrupt;
- cc->tcg_ops.do_transaction_failed = arm_cpu_do_transaction_failed;
- cc->tcg_ops.do_unaligned_access = arm_cpu_do_unaligned_access;
- cc->tcg_ops.adjust_watchpoint_address = arm_adjust_watchpoint_address;
- cc->tcg_ops.debug_check_watchpoint = arm_debug_check_watchpoint;
-#endif /* CONFIG_TCG && !CONFIG_USER_ONLY */
+ cc->tcg_ops = &arm_tcg_ops;
#endif /* CONFIG_TCG */
}