diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2021-02-12 10:48:53 -0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-02-16 13:07:56 +0000 |
| commit | 16c849784873d10d0da257d698e391fddea1f0e4 (patch) | |
| tree | 4660900bee67a03eec15528e28fc099e847a0e53 /target/arm/cpu.c | |
| parent | 2169b5c6f7a791ef9c43c72412efaafae3245114 (diff) | |
target/arm: Use the proper TBI settings for linux-user
We were fudging TBI1 enabled to speed up the generated code.
Now that we've improved the code generation, remove this.
Also, tidy the comment to reflect the current code.
The pauth test was testing a kernel address (-1) and making
incorrect assumptions about TBI1; stick to userland addresses.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-23-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.c')
| -rw-r--r-- | target/arm/cpu.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 5cf6c056c5..70cfcbc918 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -205,14 +205,10 @@ static void arm_cpu_reset(DeviceState *dev) env->vfp.zcr_el[1] = MIN(cpu->sve_max_vq - 1, 3); } /* - * Enable TBI0 and TBI1. While the real kernel only enables TBI0, - * turning on both here will produce smaller code and otherwise - * make no difference to the user-level emulation. - * - * In sve_probe_page, we assume that this is set. - * Do not modify this without other changes. + * Enable TBI0 but not TBI1. + * Note that this must match useronly_clean_ptr. */ - env->cp15.tcr_el[1].raw_tcr = (3ULL << 37); + env->cp15.tcr_el[1].raw_tcr = (1ULL << 37); #else /* Reset into the highest available EL */ if (arm_feature(env, ARM_FEATURE_EL3)) { |