diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2018-01-08 16:17:04 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2018-01-08 16:17:04 +0000 |
commit | 4124ea4f5bd367ca6412fb2dfe7ac4d80e1504d9 (patch) | |
tree | 17171e4a0929447d0b2927ae3506af21be717bcb /target/alpha/mem_helper.c | |
parent | 799044b6a3a0fc63e1e020e4d9266786a2dc7a0b (diff) | |
parent | 4fad446bc955fcaa08a21388cf82268824bea10e (diff) |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20171229' into staging
Queued TCG patches
# gpg: Signature made Fri 29 Dec 2017 20:44:06 GMT
# gpg: using RSA key 0x64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20171229:
tcg: add cs_base and flags to -d exec output
tcg: Allow 6 arguments to TCG helpers
tcg: Add tcg_signed_cond
tcg: Generalize TCGOp parameters
tcg: Dynamically allocate TCGOps
tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*
target/moxie: Fix tlb_fill
target/*helper: don't check retaddr before calling cpu_restore_state
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/alpha/mem_helper.c')
-rw-r--r-- | target/alpha/mem_helper.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c index 3c06baa93a..430eea470b 100644 --- a/target/alpha/mem_helper.c +++ b/target/alpha/mem_helper.c @@ -34,9 +34,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr, uint64_t pc; uint32_t insn; - if (retaddr) { - cpu_restore_state(cs, retaddr); - } + cpu_restore_state(cs, retaddr); pc = env->pc; insn = cpu_ldl_code(env, pc); @@ -58,9 +56,7 @@ void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, AlphaCPU *cpu = ALPHA_CPU(cs); CPUAlphaState *env = &cpu->env; - if (retaddr) { - cpu_restore_state(cs, retaddr); - } + cpu_restore_state(cs, retaddr); env->trap_arg0 = addr; env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0; @@ -80,11 +76,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx); if (unlikely(ret != 0)) { - if (retaddr) { - cpu_restore_state(cs, retaddr); - } /* Exception index and error code are already set */ - cpu_loop_exit(cs); + cpu_loop_exit_restore(cs, retaddr); } } #endif /* CONFIG_USER_ONLY */ |