diff options
author | Anthony Liguori <aliguori@us.ibm.com> | 2013-02-18 08:37:29 -0600 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-02-18 08:37:29 -0600 |
commit | 3c3adde005ec929d7d581d495d9a0bb223e6e055 (patch) | |
tree | 05d51a8fa7e87f9ed196b6926c3db84e56c41ca5 /target-xtensa | |
parent | f4c0f986c061f34fd5b020c30e2aa8c37e17193b (diff) | |
parent | 2d64255bd7c0d3933ff5ab2cabff11bcb09117a8 (diff) |
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
# By Andreas Färber
# Via Andreas Färber
* afaerber/qom-cpu: (47 commits)
target-i386: Split command line parsing out of cpu_x86_register()
target-i386: Move cpu_x86_init()
target-lm32: Drop unused cpu_lm32_close() prototype
target-s390x: Drop unused cpu_s390x_close() prototype
spapr_hcall: Replace open-coded CPU loop with qemu_get_cpu()
ppce500_spin: Replace open-coded CPU loop with qemu_get_cpu()
e500: Replace open-coded loop with qemu_get_cpu()
cpu: Add CPUArchState pointer to CPUState
cputlb: Pass CPUState to cpu_unlink_tb()
cpu: Move current_tb field to CPUState
cpu: Move exit_request field to CPUState
cpu: Move running field to CPUState
cpu: Move host_tid field to CPUState
target-cris: Introduce CRISCPU subclasses
target-m68k: Pass M68kCPU to m68k_set_irq_level()
mcf_intc: Pass M68kCPU to mcf_intc_init()
mcf5206: Pass M68kCPU to mcf5206_init()
target-m68k: Return M68kCPU from cpu_m68k_init()
ppc405_uc: Pass PowerPCCPU to ppc40x_{core,chip,system}_reset()
target-xtensa: Move TCG initialization to XtensaCPU initfn
...
Diffstat (limited to 'target-xtensa')
-rw-r--r-- | target-xtensa/cpu-qom.h | 2 | ||||
-rw-r--r-- | target-xtensa/cpu.c | 22 | ||||
-rw-r--r-- | target-xtensa/cpu.h | 1 | ||||
-rw-r--r-- | target-xtensa/helper.c | 16 |
4 files changed, 28 insertions, 13 deletions
diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h index e344a9aa79..270de16583 100644 --- a/target-xtensa/cpu-qom.h +++ b/target-xtensa/cpu-qom.h @@ -43,6 +43,7 @@ /** * XtensaCPUClass: + * @parent_realize: The parent class' realize handler. * @parent_reset: The parent class' reset handler. * * An Xtensa CPU model. @@ -52,6 +53,7 @@ typedef struct XtensaCPUClass { CPUClass parent_class; /*< public >*/ + DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } XtensaCPUClass; diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index ebc7e9979b..785e56d367 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -57,12 +57,31 @@ static void xtensa_cpu_reset(CPUState *s) reset_mmu(env); } +static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) +{ + XtensaCPU *cpu = XTENSA_CPU(dev); + XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev); + + qemu_init_vcpu(&cpu->env); + + xcc->parent_realize(dev, errp); +} + static void xtensa_cpu_initfn(Object *obj) { + CPUState *cs = CPU(obj); XtensaCPU *cpu = XTENSA_CPU(obj); CPUXtensaState *env = &cpu->env; + static bool tcg_inited; + cs->env_ptr = env; cpu_exec_init(env); + + if (tcg_enabled() && !tcg_inited) { + tcg_inited = true; + xtensa_translate_init(); + cpu_set_debug_excp_handler(xtensa_breakpoint_handler); + } } static const VMStateDescription vmstate_xtensa_cpu = { @@ -76,6 +95,9 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) CPUClass *cc = CPU_CLASS(oc); XtensaCPUClass *xcc = XTENSA_CPU_CLASS(cc); + xcc->parent_realize = dc->realize; + dc->realize = xtensa_cpu_realizefn; + xcc->parent_reset = cc->reset; cc->reset = xtensa_cpu_reset; diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 5acf78c692..dece224478 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -385,6 +385,7 @@ static inline CPUXtensaState *cpu_init(const char *cpu_model) } void xtensa_translate_init(void); +void xtensa_breakpoint_handler(CPUXtensaState *env); int cpu_xtensa_exec(CPUXtensaState *s); void xtensa_register_core(XtensaConfigList *node); void do_interrupt(CPUXtensaState *s); diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 94c03a1d3c..a8a64932da 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -54,7 +54,7 @@ static uint32_t check_hw_breakpoints(CPUXtensaState *env) return 0; } -static void breakpoint_handler(CPUXtensaState *env) +void xtensa_breakpoint_handler(CPUXtensaState *env) { if (env->watchpoint_hit) { if (env->watchpoint_hit->flags & BP_CPU) { @@ -72,8 +72,6 @@ static void breakpoint_handler(CPUXtensaState *env) XtensaCPU *cpu_xtensa_init(const char *cpu_model) { - static int tcg_inited; - static int debug_handler_inited; XtensaCPU *cpu; CPUXtensaState *env; const XtensaConfig *config = NULL; @@ -93,18 +91,10 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model) env = &cpu->env; env->config = config; - if (!tcg_inited) { - tcg_inited = 1; - xtensa_translate_init(); - } + xtensa_irq_init(env); - if (!debug_handler_inited && tcg_enabled()) { - debug_handler_inited = 1; - cpu_set_debug_excp_handler(breakpoint_handler); - } + object_property_set_bool(OBJECT(cpu), true, "realized", NULL); - xtensa_irq_init(env); - qemu_init_vcpu(env); return cpu; } |