diff options
author | Max Filippov <jcmvbkbc@gmail.com> | 2011-12-14 02:13:40 +0400 |
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committer | Max Filippov <jcmvbkbc@gmail.com> | 2012-02-18 14:55:51 +0400 |
commit | ab58c5b4fd07fbe94950ff459ef51d43cfb5b8c8 (patch) | |
tree | 654ef53b2c4e0892cd8fee7e07b398b8e3114217 /target-xtensa/translate.c | |
parent | a044ec2a066a6002f83aba5ee937db17e7493fa8 (diff) |
target-xtensa: add DEBUGCAUSE SR and configuration
DEBUGCAUSE SR holds information about the most recent debug exception.
See ISA, 4.7.7 for more details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/translate.c')
-rw-r--r-- | target-xtensa/translate.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 6a0177f027..da5fdb5817 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -119,6 +119,7 @@ static const char * const sregnames[256] = { [PS] = "PS", [VECBASE] = "VECBASE", [EXCCAUSE] = "EXCCAUSE", + [DEBUGCAUSE] = "DEBUGCAUSE", [CCOUNT] = "CCOUNT", [PRID] = "PRID", [EXCVADDR] = "EXCVADDR", @@ -535,6 +536,10 @@ static void gen_wsr_ps(DisasContext *dc, uint32_t sr, TCGv_i32 v) gen_jumpi_check_loop_end(dc, -1); } +static void gen_wsr_debugcause(DisasContext *dc, uint32_t sr, TCGv_i32 v) +{ +} + static void gen_wsr_prid(DisasContext *dc, uint32_t sr, TCGv_i32 v) { } @@ -571,6 +576,7 @@ static void gen_wsr(DisasContext *dc, uint32_t sr, TCGv_i32 s) [INTCLEAR] = gen_wsr_intclear, [INTENABLE] = gen_wsr_intenable, [PS] = gen_wsr_ps, + [DEBUGCAUSE] = gen_wsr_debugcause, [PRID] = gen_wsr_prid, [CCOMPARE] = gen_wsr_ccompare, [CCOMPARE + 1] = gen_wsr_ccompare, |