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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-11-03 16:43:32 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-11-03 16:43:32 +0000 |
| commit | eb5f222b5c125de1b47970c6096a3107ffe1d69b (patch) | |
| tree | 1a52e60e8070f9b664f761bce085edde569a5986 /target-xtensa/overlay_tool.h | |
| parent | 7135781f65f1267a72bf554ee2b7bd605f9e59aa (diff) | |
| parent | 437a8c11c06f53ed3bcdcc3e5abc5d20b2d439bd (diff) | |
Merge remote-tracking branch 'remotes/xtensa/tags/20141103-xtensa' into staging
Xtensa fixes and improvements 2014-11-03:
- build fixes for cores w/o windowed registers and with profiling
interrupts;
- fix uImage load address for MMUv2 cores;
- add script for automatic core import from xtensa configuration overlay.
# gpg: Signature made Sun 02 Nov 2014 22:04:44 GMT using RSA key ID F83FA044
# gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>"
# gpg: aka "Max Filippov <jcmvbkbc@gmail.com>"
* remotes/xtensa/tags/20141103-xtensa:
MAINTAINERS: update xtensa boards
target-xtensa: fix build for cores w/o windowed registers
target-xtensa: add core importing script
hw/xtensa/xtfpga: treat uImage load address as virtual
hw/core/loader: implement address translation in uimage loader
target-xtensa: avoid duplicate timer interrupt delivery
target-xtensa: tests: pre-process tests linker script
target-xtensa: add definition for XTHAL_INTTYPE_PROFILING
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-xtensa/overlay_tool.h')
| -rw-r--r-- | target-xtensa/overlay_tool.h | 32 |
1 files changed, 20 insertions, 12 deletions
diff --git a/target-xtensa/overlay_tool.h b/target-xtensa/overlay_tool.h index 4c0de7f06a..6105d4c8ff 100644 --- a/target-xtensa/overlay_tool.h +++ b/target-xtensa/overlay_tool.h @@ -108,20 +108,27 @@ #define XCHAL_WINDOW_UF12_VECOFS 0x00000140 #endif +#if XCHAL_HAVE_WINDOWED +#define WINDOW_VECTORS \ + [EXC_WINDOW_OVERFLOW4] = XCHAL_WINDOW_OF4_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_UNDERFLOW4] = XCHAL_WINDOW_UF4_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_OVERFLOW8] = XCHAL_WINDOW_OF8_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_UNDERFLOW8] = XCHAL_WINDOW_UF8_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_OVERFLOW12] = XCHAL_WINDOW_OF12_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, \ + [EXC_WINDOW_UNDERFLOW12] = XCHAL_WINDOW_UF12_VECOFS + \ + XCHAL_WINDOW_VECTORS_VADDR, +#else +#define WINDOW_VECTORS +#endif + #define EXCEPTION_VECTORS { \ [EXC_RESET] = XCHAL_RESET_VECTOR_VADDR, \ - [EXC_WINDOW_OVERFLOW4] = XCHAL_WINDOW_OF4_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_UNDERFLOW4] = XCHAL_WINDOW_UF4_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_OVERFLOW8] = XCHAL_WINDOW_OF8_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_UNDERFLOW8] = XCHAL_WINDOW_UF8_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_OVERFLOW12] = XCHAL_WINDOW_OF12_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ - [EXC_WINDOW_UNDERFLOW12] = XCHAL_WINDOW_UF12_VECOFS + \ - XCHAL_WINDOW_VECTORS_VADDR, \ + WINDOW_VECTORS \ [EXC_KERNEL] = XCHAL_KERNEL_VECTOR_VADDR, \ [EXC_USER] = XCHAL_USER_VECTOR_VADDR, \ [EXC_DOUBLE] = XCHAL_DOUBLEEXC_VECTOR_VADDR, \ @@ -163,6 +170,7 @@ #define XTHAL_INTTYPE_TBD1 INTTYPE_DEBUG #define XTHAL_INTTYPE_TBD2 INTTYPE_WRITE_ERR #define XTHAL_INTTYPE_WRITE_ERROR INTTYPE_WRITE_ERR +#define XTHAL_INTTYPE_PROFILING INTTYPE_PROFILING #define INTERRUPT(i) { \ |