diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2012-01-09 06:42:11 +0400 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2012-02-18 01:25:27 +0400 |
| commit | b96ac3e4cccf0ed92ffad4803d8558ebb6cdbad5 (patch) | |
| tree | 0a1bd18bed73aeeffae8bf90ca6a971b1eaa629c /target-xtensa/overlay_tool.h | |
| parent | 99c7f87826337fa81f2f0f9baa9ca0a44faf90e9 (diff) | |
target-xtensa: define TLB_TEMPLATE for MMU-less cores
TLB_TEMPLATE macro specifies TLB geometry in the core configuration.
Make TLB_TEMPLATE available for region protection core variants,
defining 1 way ITLB and DTLB with 8 entries each.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/overlay_tool.h')
| -rw-r--r-- | target-xtensa/overlay_tool.h | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/target-xtensa/overlay_tool.h b/target-xtensa/overlay_tool.h index df19cc96ea..e7c4c3a181 100644 --- a/target-xtensa/overlay_tool.h +++ b/target-xtensa/overlay_tool.h @@ -251,6 +251,8 @@ .nextint = XCHAL_NUM_EXTINTERRUPTS, \ .extint = EXTINTS +#if XCHAL_HAVE_PTP_MMU + #define TLB_TEMPLATE(ways, refill_way_size, way56) { \ .nways = ways, \ .way_size = { \ @@ -268,11 +270,23 @@ #define DTLB(varway56) \ TLB_TEMPLATE(10, 1 << XCHAL_DTLB_ARF_ENTRIES_LOG2, varway56) -#if XCHAL_HAVE_PTP_MMU #define TLB_SECTION \ .itlb = ITLB(XCHAL_HAVE_SPANNING_WAY), \ .dtlb = DTLB(XCHAL_HAVE_SPANNING_WAY) -#else + +#elif XCHAL_HAVE_XLT_CACHEATTR || XCHAL_HAVE_MIMIC_CACHEATTR + +#define TLB_TEMPLATE { \ + .nways = 1, \ + .way_size = { \ + 8, \ + } \ + } + +#define TLB_SECTION \ + .itlb = TLB_TEMPLATE, \ + .dtlb = TLB_TEMPLATE + #endif #if (defined(TARGET_WORDS_BIGENDIAN) != 0) == (XCHAL_HAVE_BE != 0) |