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authorMax Filippov <jcmvbkbc@gmail.com>2014-02-07 15:57:22 +0400
committerMax Filippov <jcmvbkbc@gmail.com>2014-02-24 04:47:01 +0400
commite848dd4248230c0463841a16d1fa9eb054a2d211 (patch)
tree73d214173bd6e72b4e9c9e9237a18e0c19f91d28 /target-xtensa/op_helper.c
parent7c84259019a945e4ff275994b96c0de4496d2a5e (diff)
target-xtensa: add basic checks to icache opcodes
Check privilege level for privileged instructions (IHU, III, IIU and IPFL are privileged), memory accessibility for instructions that reference memory (IH* and IPFL) and windowed register validity for all instruction cache instructions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/op_helper.c')
-rw-r--r--target-xtensa/op_helper.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index 89a72b5678..509ba49d60 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -415,6 +415,11 @@ void HELPER(check_interrupts)(CPUXtensaState *env)
check_interrupts(env);
}
+void HELPER(itlb_hit_test)(CPUXtensaState *env, uint32_t vaddr)
+{
+ get_page_addr_code(env, vaddr);
+}
+
/*!
* Check vaddr accessibility/cache attributes and raise an exception if
* specified by the ATOMCTL SR.