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authorMax Filippov <jcmvbkbc@gmail.com>2011-09-06 03:55:45 +0400
committerBlue Swirl <blauwirbel@gmail.com>2011-09-10 16:57:39 +0000
commit6ad6dbf7916c59b6ae6dfe208dd64e0bf89dbf0a (patch)
tree29d3895812cc52290289631b5ec2fa8059d25992 /target-xtensa/helper.c
parent797d780b1375b1af1d7713685589bfdec9908dc3 (diff)
target-xtensa: implement extended L32R
See ISA, 4.3.3 for details. TB flag XTENSA_TBFLAG_LITBASE is used to track enable bit of LITBASE SR. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-xtensa/helper.c')
-rw-r--r--target-xtensa/helper.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 4f8693448e..074207f5cf 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -38,6 +38,7 @@ void cpu_reset(CPUXtensaState *env)
{
env->exception_taken = 0;
env->pc = env->config->exception_vector[EXC_RESET];
+ env->sregs[LITBASE] &= ~1;
env->sregs[PS] = 0x1f;
}