diff options
author | Max Filippov <jcmvbkbc@gmail.com> | 2011-09-06 03:55:25 +0400 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2011-09-10 16:57:36 +0000 |
commit | 2328826b1d7d516cfe825546682cfe8513db07b4 (patch) | |
tree | 0f30067060123062e0bc8f2f99af6596bde492ea /target-xtensa/cpu.h | |
parent | 83818f7cdd0dc31cd05a517da92fc056d8078908 (diff) |
target-xtensa: add target stubs
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-xtensa/cpu.h')
-rw-r--r-- | target-xtensa/cpu.h | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h new file mode 100644 index 0000000000..a51ffc82c7 --- /dev/null +++ b/target-xtensa/cpu.h @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Open Source and Linux Lab nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef CPU_XTENSA_H +#define CPU_XTENSA_H + +#define TARGET_LONG_BITS 32 +#define ELF_MACHINE EM_XTENSA + +#define CPUState struct CPUXtensaState + +#include "config.h" +#include "qemu-common.h" +#include "cpu-defs.h" + +#define TARGET_HAS_ICE 1 + +#define NB_MMU_MODES 4 + +#define TARGET_PHYS_ADDR_SPACE_BITS 32 +#define TARGET_VIRT_ADDR_SPACE_BITS 32 +#define TARGET_PAGE_BITS 12 + +typedef struct CPUXtensaState { + uint32_t regs[16]; + uint32_t pc; + uint32_t sregs[256]; + + CPU_COMMON +} CPUXtensaState; + +#define cpu_init cpu_xtensa_init +#define cpu_exec cpu_xtensa_exec +#define cpu_gen_code cpu_xtensa_gen_code +#define cpu_signal_handler cpu_xtensa_signal_handler +#define cpu_list xtensa_cpu_list + +CPUXtensaState *cpu_xtensa_init(const char *cpu_model); +void xtensa_translate_init(void); +int cpu_xtensa_exec(CPUXtensaState *s); +void do_interrupt(CPUXtensaState *s); +int cpu_xtensa_signal_handler(int host_signum, void *pinfo, void *puc); +void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf); + +static inline int cpu_mmu_index(CPUState *env) +{ + return 0; +} + +static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, + target_ulong *cs_base, int *flags) +{ + *pc = env->pc; + *cs_base = 0; + *flags = 0; +} + +#include "cpu-all.h" +#include "exec-all.h" + +static inline int cpu_has_work(CPUState *env) +{ + return 1; +} + +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +{ + env->pc = tb->pc; +} + +#endif |