diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2012-01-15 05:40:50 +0400 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2012-02-18 14:55:52 +0400 |
| commit | 35b5c0442798c1754f1d56452528dce5fee003c2 (patch) | |
| tree | ffc45877d83c476a726558b1a0121521ea3de40a /target-xtensa/cpu.h | |
| parent | e61dc8f72c096e084106d5e97101d9d88f642d0e (diff) | |
target-xtensa: add ICOUNT SR and debug exception
ICOUNT SR gets incremented on every instruction completion provided that
CINTLEVEL at the beginning of the instruction execution is lower than
ICOUNTLEVEL.
When ICOUNT would increment to 0 a debug exception is raised if
CINTLEVEL is lower than DEBUGLEVEL.
See ISA, 4.7.7.5 for more details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'target-xtensa/cpu.h')
| -rw-r--r-- | target-xtensa/cpu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index a18072b7bd..92441e34f9 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -142,6 +142,8 @@ enum { DEBUGCAUSE = 233, CCOUNT = 234, PRID = 235, + ICOUNT = 236, + ICOUNTLEVEL = 237, EXCVADDR = 238, CCOMPARE = 240, }; @@ -429,6 +431,7 @@ static inline int cpu_mmu_index(CPUState *env) #define XTENSA_TBFLAG_EXCM 0x4 #define XTENSA_TBFLAG_LITBASE 0x8 #define XTENSA_TBFLAG_DEBUG 0x10 +#define XTENSA_TBFLAG_ICOUNT 0x20 static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, target_ulong *cs_base, int *flags) @@ -448,6 +451,9 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, if (xtensa_get_cintlevel(env) < env->config->debug_level) { *flags |= XTENSA_TBFLAG_DEBUG; } + if (xtensa_get_cintlevel(env) < env->sregs[ICOUNTLEVEL]) { + *flags |= XTENSA_TBFLAG_ICOUNT; + } } } |